Samsung's Memory Business Reform: Accelerating the Layout of Next-Gen Storage Tech

2025-12-02

In November 2025, Samsung Electronics announced a significant organizational restructuring aimed at enhancing its competitive edge in the next-generation memory chip market. The core of this adjustment was the dissolution of the High Bandwidth Memory (HBM) special development team, which had been established just a year earlier, and the integration of its personnel and operations into the design team under the DRAM development department. The newly established Memory Technology Development Department will integrate key R&D functions of Samsung and will be led by Hwang Sang-joon, the current head of the DRAM Product and Technology team. This move is seen as Samsung's effort to accelerate the development of next-generation HBM technology, with specific goals including the upcoming sixth-generation HBM4 and seventh-generation HBM4E.

Samsung's strategic goal in this restructuring is to solidify its leading position in the DRAM market while laying a solid foundation for the future development of HBM technology. The company plans to optimize resource allocation to improve production efficiency and product yield in response to the rapidly changing market demands.

HBM4 Technology Progress and Market Layout

Samsung's Memory Business Reform: Accelerating the Layout of Next-Generation Storage Technology

Samsung is currently actively advancing the development and mass production of HBM4 chips. According to the latest news, Samsung has delivered HBM4 samples to major customers, including NVIDIA, and is undergoing multiple qualification tests. It is revealed that the logic chip yield of Samsung's HBM4 has exceeded 90%, while the yield of the 1c DRAM itself has also been increased to around 50%. If the certification goes smoothly, Samsung is expected to enter NVIDIA's supply chain in the second quarter of 2026.

Samsung's HBM4 products feature advanced 1c DDR5 front-end technology and 4nm logic base dies, offering low power consumption and high performance. Particularly in the high-speed transmission field (>11Gbps), Samsung's technological advantage is evident. In addition, Samsung plans to ensure the market penetration of HBM4 through competitive pricing and higher production capacity.

Advanced Deployment of DRAM Technology

In terms of DRAM technology, Samsung has adopted an advanced deployment strategy and has taken the lead in mass-producing the sixth-generation 1c DRAM technology. This technology provides greater bandwidth and lower power consumption for AI and high-performance computing (HPC) scenarios. Currently, Samsung's yield of 1c DRAM has climbed to 70%, with plans to further increase it to 80% to 90%.

Samsung plans to expand its monthly production capacity of 1c DRAM to 200,000 wafers by the end of 2026. Specifically, Samsung aims to reach a monthly capacity of 60,000 wafers in the fourth quarter of 2025, increase by 80,000 wafers in the second quarter of 2026, and add another 60,000 wafers in the fourth quarter. This capacity expansion plan will be realized by expanding the Pyeongtaek Fourth Factory (P4) and converting existing production lines into dedicated 1c manufacturing lines.

Market Reaction and Future Outlook

The market has reacted positively to Samsung's reform. Morgan Stanley expects that Samsung, leveraging its technological advantages in HBM4 and DRAM, will achieve a significant increase in earnings per share (EPS) in 2026, growing by over 150% compared to 2025. Additionally, the rational strategy adopted by Samsung's management—collaborating with key customers and adjusting supply according to real demand—has also been recognized by the market.

Looking ahead, Samsung plans to further consolidate its leading position in the memory market through continuous technological innovation and capacity expansion. With the mass production of HBM4 and the popularization of 1c DRAM technology, Samsung is expected to capture a larger share of the global memory market. Moreover, Samsung also plans to achieve stable supply of 2nm GAA process chips and HBM4 base chips in 2026.

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